*Weaving Models of Computations into models with MARTE/CCSL*
*About the position*
The Clock Constraint Specification Language (CCSL) was initially defined in an annex of the UML profile for MARTE to extend the mainly untimed UML with a rich and expressive time model adequate for the design and analysis of real-time and embedded systems. While a model represents a syntactic structure, it should come together with a set of execution rules reflecting causal and timed relationships, i.e., its Model of Computation (MoC). Usually the MoC is implicit and informal or hidden in tools implementation, thus preventing semantic-aware transformations. CCSL was devised to address this issue by providing a domain-specific modeling language dedicated to express causal and timed relationships explicitly in a model.
In its current use, CCSL models are associated with other syntactic models through references. Two main issues have still to be addressed. First, how can the MoC be instanciated on the model from a description realized at the meta-model level, rather than a manual instanciation for each model. Second, how can several MoCs be composed by weaving them together in an intrusive way, i.e., by considering or predicting the emerging properties of this composition.
The successful applicant should be familiar with model-driven engineering techniques and preferably also familiar with embedded systems design. The position can open any time during the year 2011 and last for one year. Time extensions are possible and depends on achievements.
- TimeSquare: http://www.inria.fr/sophia/aoste/dev/time_square/
- MARTE: http://www.omgmarte.org
- Aoste: http://www-sop.inria.fr/aoste/
*funding and application*
The availability is subject to a national selection amongst INRIA applications.
The application must be done before March, 31st directly on INRIA web site
Please quote 10 Academic Resources Daily in your application to this opportunity!